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This results in an improved cache hit ratio in comparison with existing products based on the SH-4 core.
If a subsequent read I/O wants a block stored in the cache, a cache hit and then a long trip out to the disk pool is avoided.
The SH7397's high-performance SH-4A CPU core has two separate 32-Kbyte, 4-way set-associative cache memories -- one for instructions and the other for data -- to improve the cache hit rate for higher throughput.
 
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