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Transitioning to Nap mode requires a hardware handshake, since the PowerPC 603 will not enforce data cache coherency in this mode.
In addition to providing this technology, the Foundation Suite leverages the File System and Volume Manager products and offers cluster virtualization, fast failover, virtual single file systems, and global locks to manage access to data and provide cache coherency.
The secret sauce of a large SMP that has a large number of CPUs (16, 32, 64, and so forth) is its hardware-based cache coherency model.
This is why many owners of large SMP systems typically use 'slices' of the SMP to minimize the extent of cache coherency domains and disable cache coherency across the entire system.
However, unless the RAID controllers doing the caching are configured in dual active pairs and designed with cache coherency and robust recovery mechanisms, caching can cause incorrect data to be delivered to applications and corrupt databases when elements in the I/O path fail.