bump

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SJSemi started mass production of both 28nm and 14nm wafer bumping in 2016, and now ships over 10,000 per month of 12-inch wafers.
Bumping is a technique that requires no special skill; a thief can learn and use the technique in mere moments.
Note that solder bumping takes place at the wafer level and not the single die level.
Because the NSX is a complete solution, performing accurate and consistent high-speed bump inspection on many different bump applications, the NSX Series is an excellent solution for Flip Chip Technologies and the licensees of their bumping technology," Nelson continued.
Average bump height measurements and standard deviations for each die on a single wafer can be plotted as a surface showing characteristic bumping process variation across a wafer.
So, as her family waved good-bye, Bumpelina left to go bumping.
The bumping facility's floor space will be increased by 100 percent and the increased capacity will be three times that of UAT's current bumping capacity.
Chipmore chose the Sigma fxP PVD solution for their new copper (Cu) bumping line, as it provides superior results and lowest cost of ownership over competitor systems.
Probing before bumping was found to accelerate the drift in resistance.
F]C bumping process is a totally additive technique in which wafers are coated with a dielectric passivating layer using screen printing techniques.
TSMC s leading-edge flip chip BGA package technology provides Arria 10 devices with better quality and reliability than standard copper bumping solutions through the use of fine-pitch copper bumps.