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Related to code density: MIPS, microprocessor
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This core also provides the microMIPS[R] instruction-set architecture, which improves code density while operating at near full rate, instruction and data cache, and its 200 MHz/330 DMIPS offers 3x the performance of the PIC32MX.
The compact core provides a cost effective solution for space-constrained applications and includes both a 32-bit instruction set for fast execution as well as 16-bit instructions for high code density.
The enhanced instruction set is designed to closely couple the architecture and compiler, enabling higher code density and even better performance.
Our DSP Cores are designed to meet the high code density requirements, thereby reducing the overall chip cost.
Logic PD chooses IAR Embedded Workbench year after year because of its superior code density, speed optimization, seamless project setup and excellent support.
The AVR32 core consistently outperforms competing 32-bit cores in every EEMBC(R) benchmark for performance and code density and executes C/C++ algorithms.
The Thumb-2 instruction set combines 16- and 32-bit instructions to improve code density and performance.
The advantages of StarCore's variable length execution set (VLES) architecture, coupled with our accelerated development path, has enabled us to define a product with high code density and efficient performance that meets our customers' expectations in a timely manner.
StarCore's VLES (variable-length execution set) technology, which combines high signal processing performance with microcontroller-like code density, is a key factor in achieving the necessary high levels of integration.

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